We Built Solar DC With Grid Connectivity in 2009.
Now the World Calls It “Hybrid Inverter Technology.”

In 2009, inside an R&D lab at Su-Kam Power Systems in Gurgaon, I conceived and my engineering team built firmware for a product called the SolarPack DC 120. The microcontroller was a Texas Instruments MSP430G2761 — a 16-bit MCU running at 16 MHz with kilobytes of flash. The code implemented multi-stage MPPT charging, battery protection, grid-connectivity logic, and bidirectional power management. No cloud. No AI. Just tight embedded C, interrupt-driven ADC sampling, and a clear conviction: solar DC and grid AC must coexist on a shared DC bus with seamless, intelligent switching.

Seventeen years later, companies like Tesla, Enphase, Growatt, and APsystems sell “hybrid inverters” and “solar-integrated Online UPS systems” built on the exact same architecture. The industry calls it innovation. I call it validation — and a painful reminder of what was lost.

77 Technology Patents — All Lost in IBC

The Circuit: DC-Direct Architecture

The fundamental idea was deceptively simple: treat the DC bus as the center of the power universe. Solar panels feed DC through an MPPT controller. The grid feeds AC through a rectifier as backup only. A LiFePO4 battery bank sits on the bus as both load and source. And the output — 48V, 12V, 5V, 3.3V via DC-DC converters — draws from this unified bus with zero AC conversion loss.

This is the double-conversion Online UPS topology with solar as the primary input. AC comes in as backup, gets rectified to DC. Solar DC feeds through MPPT. Both merge on the DC bus. The battery sits bidirectionally on the bus. The output draws from this unified rail.

The Firmware: What the Code Actually Did

I still have the compiled binary — SolarPack_Su-kam_DC_120_1.out, an ELF file targeting the MSP430G2761. The debug symbols tell the complete story. Here are the subsystems, exactly as they appear in the symbol table:

DCO_clock()          // DCOCTL ← CALDCO_16MHZ, BCSCTL1 ← CALBC1_16MHZ
gpio_init()          // P1-P4 DIR/OUT/SEL: MOSFET gates, relays, LEDs, DIP switches
adc_init()           // ADC10CTL0/1, ADC10AE0: 7-channel mux, Vref, sample-hold
pwm_init()           // TACTL, TACCTL1, TACCR0, TACCR1: carrier freq + duty cycle
timer_init()         // TBCTL, TBCCTL0/1, TBCCR0: periodic control loop ISR
UART_A0_init()       // UCA0CTL1, BR0, BR1, MCTL: serial telemetry
short_circuit_init() // Hardware comparator fast-trip protection

// Variables extracted from the symbol table:
pv_power      = pv_volt_avg * pv_cur_avg     // instantaneous power
pv_power_prev                                // previous sample
diff_power3   = pv_power - pv_power_prev     // delta-P
diff_voltage  = pv_volt_avg - pv_volt_avg_prev  // delta-V

// P&O decision:
if (diff_power3 > 0 && diff_voltage > 0) decrease duty
if (diff_power3 > 0 && diff_voltage < 0) increase duty
if (diff_power3 < 0 && diff_voltage > 0) increase duty
if (diff_power3 < 0 && diff_voltage < 0) decrease duty

// Output:
TACCR1 = duty   // Timer A CCR1 drives the MOSFET gate

tempLookUp[]              // NTC to temperature table in .data section
convertTemperature()      // ADC count to degrees
bulk_volt_acc_to_amb_temp() // adjusts bulk/absorption/float setpoints

// Compensated setpoints:
bulk_voltage              // bulk charge target (temp-adjusted)
batt_absorp_volt          // absorption voltage (temp-adjusted)
batt_absorp_volt3         // secondary absorption threshold

batt_absorp_method()      // CC to CV transition
batt_float_method()       // Reduces to float voltage
equalisation_method()     // Periodic overcharge for cell balancing
battery_selection()       // P4IN DIP switch: 12V/24V battery config

// Protection thresholds:
batt_v_max_limit    batt_v_min_limit    batt_low_v
batt_high_v         batt_float_v_ref    batt_v_mppt_rec

overload_chk_method()           // over_load_v_avg vs threshold
battery_low_cond_met()          // 6-stage low battery (batt_low_ct1-6)
batt_low_high_cut_reco_met()    // cut & reconnect with debounce
sc_ol_retrail_met()             // auto-retry after SC/OL fault

// LED indication state machines:
pro_ind_sc_on_off_t   pro_ind_ol_on_off_t   pro_ind_ht_on_off_t
pro_ind_bl_on_off_t   pro_ind_bh_on_off_t

7 ADC Sensing Channels

The MSP430’s single 10-bit ADC was multiplexed across seven analog inputs, each sampled and averaged over multiple interrupt cycles:

Source File Map — From the ELF Debug Symbols

How the World Caught Up: 2009 to 2026

Same Topology, Different Marketing Budgets

Rebuilding: Su-vastika and 25+ New Patents

The Lesson

When I built the SolarPack DC 120 at Su-Kam in 2009, I wasn’t trying to create a product category. I was solving a practical problem: India had unreliable grid power, abundant sunlight, and millions of people using diesel generators and basic inverters. Combining solar DC with grid connectivity in a single intelligent controller was the obvious engineering answer.

The fact that the global energy industry arrived at the same architecture 15+ years later — through Tesla’s billions, Enphase’s IPO, and a decade of venture-funded cleantech — tells you something about the nature of good engineering. The right topology doesn’t need a marketing budget. It just needs time for the market to catch up.

The 77 patents are gone. India’s IBC process saw to that. But the firmware is still here — SolarPack_Su-kam_DC_120_1.out, with my team’s function names in the debug symbols. And every hybrid inverter shipping today owes a quiet debt to the engineers who wrote batt_absorp_method and power_calc_method2 on a 16-bit microcontroller in a Gurgaon office in 2009.

“I didn’t set out to build a company. I set out to solve a problem — and the company became the answer.” — Kunwer Sachdev

Build ahead. The world follows.